I wonder if it is possible to write a kernel that would keep all of its RAM encrypted, storing the key in the CPU cache, so that the machine would be resistant to cold-boot attacks?
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Data in L1 cache will not remain in L1 cache only; the hardware will copy it to main RAM transparently and almost immediately. At least so operate modern CPU. If you want to keep sensitive data out of RAM, then you must keep it in registers only. Context switches will be a problem, also, since they automatically flush registers to a designated RAM space. While it is theoretically possible to operate only in registers and do encryption and decryption in the CPU only, it will be hard to do correctly (random-access encryption with updates is difficult to design without weaknesses) and it will be very expensive (you would more or less have to implement a virtual machine, where each opcode entails some decryption, so expect a slowdown of a factor 50 at least). The TRESOR project appears to be much more limited in scope; it does not want to protect generic data from leaking to RAM, only encryption keys. Which, in my opinion, misses the point. You encrypt data because that data is sensitive and should be kept confidential. The encryption key is a high-value target because it concentrates secrecy, but certainly not the only target. |
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Yes, you could write a kernel that stored the key in a CPU register. SSE processors (basically any running Intel architecture) have 128 bit "XMM" registers that the key can be stored in, and the latest Intel chips can do hardware-based AES. One register, one key, one CPU instruction. You'd lose a multipurpose register and have to swap into kernel mode very often (massive performance killer) or give each application its own key that is encrypted with the kernel's key, but it'd work. The wicked catch is that a context switch usually puts the register values into RAM. The key and anything else in the kernel have to be bumped because any application can use all general-purpose registers. What's really needed is a persistent register that is addressable only by ring 0. I know these exist as control registers, but wasn't sure of any general purpose ones are laying around for the taking. I then looked at d33tah's link to TRESOR and it turns out somebody actually implemented it. Do read up on the caveats and such. |
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Some Googling pointed me to http://en.m.wikipedia.org/wiki/TRESOR - using it with an encrypted swapfile sounds like a solution. |
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