On an ARM Cortex A9 core, privileged instructions have to be executed so that unprivileged code can use performance counters. For instance with this GCC inline code, which would have to be run in a kernel:
/* Allow access to perf counter */ __asm__ __volatile__ ("\tMCR p15, 0, %0, C9, C14, 0\n" :: "r" (1)); /* Turn off counter overflow interrupts */ __asm__ __volatile__ ("\tMCR p15, 0, %0, C9, C14, 2\n" :: "r" (0x8000000f));
If access is not enabled, then user programs which try to access the cycle counter receive an "illegal instruction" exception, and of course user programs cannot run the enable sequence.
My question is, is there some security reason for protecting the counters?
All I can think of is that in a trusted computing type environment, unprivileged code could obtain very precise timing information about calls to some security sensitive code.
I want to get as much information as I can before adding such code to the startup code of a kernel that customers will integrate into end products which have tight security requirements.