Intel has recently added new instructions to their instruction set to support bounds checking. Intel calls them the Memory Protection Extensions (MPX), and they are described in Chapter 9 of this manual. In a nutshell, you can use the new MPX instructions to load a base and upper limit into special registers before doing a memory operation; the processor will then check that the memory address is within bounds and will trap if not. Basically, this is hardware-level support for bounds checking.
This looks highly intriguing. Up until now, one of the major challenges with deploying automatic bounds-checking for C and C++ programs is performance: if a compiler option will slow down your program by 50%, or 10%, many developers may be reluctant. This hardware extension sounds like the sort of thing that could potentially address the performance address, and maybe also make it easier for compilers to enable automatic bounds-checking with less complexity in the compiler code.
So, is this useful in practice? Do any existing compilers offer support for hardware-accelerated bounds checking using these instructions? Are there any measurements on what the performance overhead of this kind hardware-accelerated bounds checking?